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 ISL6121
TM
Data Sheet
May 2001
File Number
9004.1
Single Supply Integrated Current Limiting Controller
The ISL6121 is a single supply Overcurrent (OC) fault protection IC for 2.5V to 5V applications where 2A current limiting is desired. This device features internal current monitoring and limiting along with a 50m integrated power switch and a current limited time out to latch-off feature for system protection. The time to latch-off is independent of device temperature, and magnitude of OC. Each ISL6121 incorporates in a 8 lead SOIC package a 50m N-channel MOSFET power switch for power control. The switch is driven by a constant current source giving a controlled ramp up of the output voltage. This provides a soft start turn-on eliminating bus voltage drooping caused by inrush current while charging heavy load capacitances. (Enable high (ISL6121H) and enable low (ISL6121L) options are) available with a fault reporting output compatible with 3V and 5V logic level signals allowing for external control and monitoring. The Under Voltage (UVLO) lockout feature prevents turn-on of the output unless the correct ENABLE signal and VIN > 2.5V are both present. During initial turn-on the ISL6121 design prevents a fault from being presented by blanking the fault signal, unlike other vendor devices needing additional external circuitry to accomplish this. Rising and falling output is a current-limited voltage ramp so that both the inrush current and voltage slew rate are limited, independent of load. This reduces supply droop due to surge and eliminates the need for external EMI filters. During operation once an OC condition is detected the output is current limited to 2A to allow for a transient condition to pass. If still in current limit after the current limit period has elapsed the output is latched off and the fault is reported by pulling the FAULT low. The FAULT signal is latched low until reset by the enable signal being deasserted at which time the FAULT signal will clear. See Figure 1 for typical application configuration.
Features
* 0.05 Integrated Power N-channel MOSFET Switch * Accurate Current Sensing and Limiting * 12ms Timed Fault Latch-Off, No thermal Dependency * 2.5V to 5.5V Operating Range * Under Voltage Lockout * Disabled Output Internally Pulled Low * Controlled Turn On/Off Ramp Times * Fault Output Signal * Logic Level Enable High Inputs (ISL6121H) or Enable Low Inputs (ISL6121L) * Logic Level Compatible Enable Input and Fault Output
Applications
* Fibre Channel * Industrial Power Control * Hot Plug
1 2 3
GND VIN VIN
OUT OUT OUT
8 RL 7 6 CL
4 EN
FAULT 5
FIGURE 1. ISL6121 TYPICAL APPLICATION
Ordering Information
PART NUMBER ISL6121HIB ISL6121HIB-T ISL6121LIB ISL6121LIB-T ISL6121HEVAL1 TEMP. RANGE (oC) -40 to 85 -40 to 85 -40 to 85 -40 to 85 PACKAGE 8 Ld SOIC PKG. NO. M8.15
8 Ld SOIC Tape and Reel 8 Ld SOIC M8.15
8 Ld SOIC Tape and Reel
Evaluation Platform
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2001, All Rights Reserved
ISL6121 Simplified Block Diagram
GND
OUT
VIN Q-PUMP POR VIN CURRENT AND TEMP. MONITORING, GATE AND OUTPUT CONTROL LOGIC
OUT
OUT
EN
LOGIC
FAULT
Pin Descriptions
PIN # 1 2, 3 SYMBOL GND VIN FUNCTION IC GND Reference Chip Bias, Controlled Supply Input, Undervoltage Lock-Out Enable / Enable Not Input VIN provides chip bias voltage. At VIN < 2.5V chip functionality is disabled, FAULT latch is cleared and floating. OUT is pulled and held low. Enables chip when VIN and ENABLE > 2.5V or ENABLE < 0.6V DESCRIPTION
4 5
ENABLE / ENABLE FAULT
Over Current Fault Indicator Overcurrent fault indicator.FAULT is disabled for 12ms after turn-on. This output is pulled low to GND after the current limit time-out period has expired and stays latched until ENABLE is deasserted. Controlled Supply Output Voltage output, connect to load to protect. Upon an overcurrent condition VOUT is current limited to 2A. Current limit response time is within 200S. This output will remain in current limit for approximately 12ms before being latched off.
6, 7, 8
VOUT
2
ISL6121
Absolute Maximum Ratings
Supply Voltage (V+ to V-). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.0V EN, FAULT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to 6V OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND-0.3V to VIN +0.3V DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY Output Current . . . . . . . . . . . . . . . . . . . . . . .Short Circuit Protected ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . 3KV
Thermal Information
Thermal Resistance (Typical, Note 1)
JA (oC/W)
8 Lead SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC Supply Voltage Range (Typical) . . . . . . . . . . . . . . . . . . 2.5V to 5.5V
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: r 1. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 fo details.
Electrical Specifications
PARAMETER POWER SWITCH ISL6121 On Resistance at 2.7V
VSUPPLY = 5V, Unless Otherwise Specified. SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
rDS(ON)_27
VIN = 2.7V, IOUT = 0.8A,T A = TJ = 25oC TA = TJ = 85oC VIN = 3.3V, IOUT = 0.8A,T A = TJ = 25oC TA = TJ = 85oC VIN = 5V, IOUT = 0.8A,T A = TJ = 25oC TA = TJ = 85oC VIN = 5V, Switch Disabled, 50A Load RL = 10, CL = 0.1F, 10%-90% RL = 10, CL = 0.1F, 90%-10% RL = 1, CL = 0.1F, 90%-10%
-
60 50 50 300 10 10 3
70 80 60 75 60 75 450 -
m m m m m m mV V/ms V/ms V/s
ISL6121 On Resistance at 3.3V
rDS(ON)_33
ISL6121 On Resistance at 5.0V
rDS(ON)_50
Disabled Output Voltage Output Voltage Rising Rate Slow VOUT Turn-off Rate Fast VOUT Turn-off Rate CURRENT CONTROL Current Limit, VIN = 5V OC Regulation Settling Time Severe OC Regulation Settling Time Over Current Latch-off Time I/O PARAMETERS Fault Output Voltage ENABLE High Threshold ENABLE Low Threshold ENABLE Low Threshold ENABLE Input Current BIAS PARAMETERS Enabled VIN Current Disabled VIN Current Under Voltage Lockout Threshold UV Hysteresis Over Temperature Disable
VOUT_DIS t_vout_rt t_svout_offt t_fvout_offt
Ilim tsettIlim tsettIlim_sev tOC_loff
VOUT = 3.3V RL = 1.6, CL = 0.1F to Within 10% of CR RL< 1, CL = 0.1F to Within 10% of CR TJ = 25oC
1.5 -
2 1 100 12
2.5 -
A ms s ms
Vfault Ven_vih Ven_vil Ven_vil Ien_i
Fault Output Current = 10mA VIN = 5.5V VIN = 2.7V VIN = 4.5V ENABLE = 0V to 5V, VIN = 5V, TJ >25oC Switch Closed, OUTPUT = OPEN, TJ > 0oC Switch Open, OUTPUT = OPEN VIN Rising, Switch Enabled
2.0 -0.5
0
0.4 0.6 0.8 0.5
V V V V A
IVDD IVDD VUVLH UVHYS Temp_dis
1.7 50 -
120 2.25 100 150
200 5 2.5 -
A A V mV
oC
3
ISL6121 Introduction
The ISL6121 is a single channel Overcurrent (OC) fault protection IC for the +2.5V to +5V environment. Each ISL6121 incorporates in a single 8 lead SOIC package a 50m N channel MOSFET power switch for power control. See Figure 3 for switch resistance curves. With an enabling input and fault reporting output compatible with 3V and 5V logic allowing for external control and monitoring. See Figure 2 for IC operational waveforms. This device features internal current monitoring, consistent current limiting and an integrated power switch with a current limiting timed delay to latch-off feature for system protection.
Latch-Off Time Delay
The primary function of any OC protection device is to quickly isolate the voltage bus from a faulty load. Unlike many other manufacturers' IC products that sense the IC thermal condition (the monitored IC junction temperature depends on a number of factors the most important of which are power dissipation of the faulted switch and the package temp) to isolate a faulty load, the ISL6121 uses an internal 12ms timer that starts upon OC detection. Once an OC condition is detected the output is current limited for a nominal 12ms to allow transient conditions to pass before latch-off. The time to latch-off is independent of the device's thermal condition. If, after the ISL6121 has latched off, and the fault has asserted and the enable is not deasserted but the OC condition still exists, the ISL6121 unlike other IC devices does not send to the controller a continuous string of fault pulses. The ISL6121's single fault signal is sent at the time of latch off.
Key Feature Description and Operation
UV Lock Out
The ISL6121 undervoltage lockout feature prevents functionality of the device unless the correct ENABLE state and VIN > 2.5V are present.
Soft Start
A constant 500nA current source ramps up the switch's gate causing a voltage follower effect on the output voltage. This provides a soft start turn-on and eliminates bus voltage drooping caused by inrush current charging heavy load capacitances. The rising and falling output is a current limited voltage ramp so that both the inrush current and voltage slew rate are limited, independent of load. This reduces supply droop due to surge and also eliminates the need for external EMI filters necessary on other IC products. See Figure 4 for turn-on wave forms.
Slow And Fast Shutdown
The ISL6121 has two shutdown modes. When disabled with a Load Current less than the CR level the ISL6121 shuts down in a controlled manner using a 500nA constant current source controlled ramp. When latched-off during CR or if the timer has expired the ISL6121 quickly pulls down the output thereby quickly removing the faulted load from the voltage bus. See Figures 9 and 10 for waveforms of each mode.
Temperature Shutdown
Although the ISL6121 has a thermal shutdown feature, because of the 12ms timed shutdown this will only be invoked in extremely high ambient temperatures.
Fault Blanking On Start-Up
During initial turn-on the ISL6121 prevents nuisance faults being reported to the system controller by blanking the fault signal for 12ms. This blanking eliminates the need for external RC filters necessary for other vendor products that assert a fault signal upon initial turn-on into a temporary high current condition. See Figures 11 through 13 for waveform examples.
Active Output Pulldown
Another unique ISL6121 feature is the active pull down on the outputs to within 300mV of GND when the device is disabled.
Current Regulation
The ISL6121 has integrated current sensing on the power MOSFET that allows for rapid control of OC events. Once an OC is detected the ISL6121 goes into its Current Regulation (CR) control mode. The ISL6121 CR level is set to a nominal 2A. This current regulation is 20% over the full operating temperature and voltage bias range. See Figures 5 and 6 for illustrative curves. The speed of this control is proportional to the magnitude of the OC fault. Thus a hard over current is more quickly controlled than a marginal condition. See Figure 7 for waveforms illustrating this and Figure 8 for an accompanying graph.
4
ISL6121 Typical Performance Curves
ON FAULT OFF ENABLE 75 SWITCH ON RESISTANCE (mW) RESET BY ENABLE CURRENT REGULATION SETTLING TIME (1.4ms) 70 65 60 55 50 45 40 35 -40 -30 -20 -10 12ms CURRENT REGULATION PERIOD 0 10 20 30 40 50 60 70 80 90 100 VIN = 3.3V VIN = 5V VIN = 2.7V
LATCH-OFF SET
VOUT
OVER CURRENT IOUT 2A CURRENT LIMIT
TEMPERATURE (oC)
FIGURE 2. OPERATIONAL WAVEFORMS
FIGURE 3. SWITCH RESISTANCE AT 1A
ENABLE
2400 -40oC VOUT IOUT (mA) 2200
CL = 0.1F, 10F
2000
25oC
CL = 100F 1800 85oC 1600 1.25 VOUT (1V/DIV.) TIME (200s/DIV.) 1.5 1.75 2.0 2.25 VOUT (V) 2.5 2.75 3.0 3.1
FIGURE 4. VOUT SOFT START vs CLOAD
FIGURE 5. CURRENT REGULATION vs VOUT (VIN = 3.3V)
2400 OUTPUT CURRENT (1A/DIV) -40oC 2200 IOUT (mA) 25 oC 2000 85 oC 1800
CURRENT REGULATED LEVEL
1600 1.3 1.5 2.0 2.5 3.0 VOUT (V) 3.5 4.0 4.5 4.8
NOMINAL CURRENT TIME (200s /DIV.)
FIGURE 6. CURRENT REGULATION vs VOUT (VIN = 5.0V)
FIGURE 7. OC TO CR SETTLING TIME WAVEFORMS
5
ISL6121 Typical Performance Curves
1.6 TIME TO CURRENT REGULATION (mS) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 3 4 5 6 7 8 9 FAULT CURRENT (A) 10 1 12 VOUT (1V/DIV.) TIME (200s/DIV.) CL = 0.1F, 10F CL = 100F VOUT
(Continued)
ENABLE
FIGURE 8. CR SETTLING TIME vs FAULT CURRENT
FIGURE 9. SLOW TURN-OFF vs CLOAD
ENABLE VOUT
CL = 10F
VOUT
CL=100F IOUT CL = 0.1F VOUT VOUT (1V/ DIV.) TIME (400s /DIV.) 12ms TIME (2ms/DIV.)
FIGURE 10. FAST TURN-OFF vs CLOAD
FIGURE 11. ISL6121 TURN-ON INTO 3A OC
ENABLE FAULT FAULT VOUT
ENABLE
IOUT VOUT
TIME (1ms/DIV.)
TIME (2ms /DIV.)
FIGURE 12. ISL6121 TURN-ON INTO A 6ms MOMENTARY OC
FIGURE 13. VENDOR TURN-ON INTO A 6ms MOMENTARY OC
6
ISL6121 Using the ISL6121EVAL1 Platform
General and Biasing Information
The ISL6121EVAL1 platform, Figure 17, allows evaluation of the ISL6121 power supply control IC and comparison against a suitably sized (1.85A hold current rating) PPTC component. The evaluation platform is biased and monitored through numerous test points (TP#). See Table 1 for test point assignments and descriptions.
TABLE 1. ISL6121EVAL1 TEST POINT ASSIGNMENTS TP # TP1 TP2 TP4 TP5 TP6 TP9 TP10 TP11 DESCRIPTION Eval Board and IC GND Eval Board +5V Bias Enable Fault VOUT IC VIN Pin PPTC Load Side Invoke Over Current
By enabling the ISL6121H switches by signaling TP4 high (> 2.4V) the IC is also loaded with a nominal 1.5A current. Provided test points enable the evaluation of voltage loss across the PPTC (TP9 - TP10) and likewise across the ISL6121 enabled switch (TP9 - TP6). Expect to see 10% 30% greater voltage loss across the PPTC than the ISL6121. An Overcurrent (OC) condition can be invoked on both the ISL6121 and the PPTC by driving TP11 to +6V, causing SW1 to close and a nominal 3A load is imposed on each. This represents a current overload to the ISL6121 and is thus quickly current regulated to the 2A limit. If the OC duration extends beyond the nominal 12ms of the internal ISL6121 timer then the output is latched off and the fault output is asserted by being pulled low, turning on the FAULT_ LED. The primary function of any OC protection device is to quickly isolate the voltage bus from a faulty load. Unlike the PPTC and some other vendor available IC products, the ISL6121 internal timer that starts upon OC detection provides consistent protection that is independent of temperature. Figures 14 through 16 illustrate the comparative efficiency and effectiveness of the ISL6121 vs the PPTC in protecting and isolating a faulty load capable from drooping the system bus in that system.
Upon proper bias the PPTC, F1, has a nominal 1.5A load current passing through it which is the below the hold current rating for that particular device. Removal of the PPTC is necessary to isolate the ISL6121 as the PPTC load current is common to the ISL6121EVAL1 bias connections.
VIN = 5.07V ISL6121 VOUT = 5V ISL6121 VOUT PPTC VOUT = 4.96V 12ms OC LATCH-OFF TIME
PPTC VOUT
VOUT (100mV/DIV.)
VOUT (1V/DIV.)
TIME (2ms/DIV.)
FIGURE 14. ISL6121 vs PPTC INTO 3.3 LOAD
FIGURE 15. ISL6121 vs PPTC INTO 1.6 LOAD
7
ISL6121
PPTC VOUT
29s PPTC OC RESPONSE TIME
ISL6121 VOUT
VOUT (1V/DIV.)
TIME (4s/DIV.)
FIGURE 16. ISL6121 vs PPTC WITH EXTENDED 1.6 LOAD
C1 1 VIN C4 R10 OUT 7 ISL6121H OUT 6 3 VIN 4 EN R11 R5 D1 FAULT_OUT 5 D2 2 VIN R2 OUT 8 R1
C2
Q1A
5V R6 R8 R9 C3 0 OC
R3 F1
R4
Q1B
D3 R7
FIGURE 17. ISL6121EVAL1 SCHEMATIC AND PHOTOGRAPH
8
ISL6121
TABLE 2. ISL6121EVAL1 BOARD COMPONENT LISTI NG COMPONENT DESIGNATOR DUT1 R1 - R4 R5-R7 C1 C2 - C3 D1 - D3 F1 C4 Q1 ISL6121H Load Resistors LED Current Limiting Resistor Chip Decoupling Capacitor Load Capacitor Indicating LEDs 1.85A Hold Current Poly-Fuse Bulk Filter Capacitor Over Current Switch COMPONENT FUNCTION COMPONENT DESCRIPTION Intersil, ISL6121H, Integrated FET Hot Plug Controller YAGEO, 3.3 5%, 10W, 3.3W-10-ND 470, 0805 0.1F, 0805 100F 16V Electrolytic, Radial Lead 0805, SMD LEDs Red Raychem, RUSB185 or Equivalent 100F 16V Electrolytic, Radial Lead Intersil, ITF86110DK8T, 7.5A, 30V, 0.025 Dual N-Channel MOSFETs 47, 0805 1.2K, 0805, R10 Not Populated
R8 - R9 R10 - R11
Gate Series Resistors Enable Pullup/Pulldown Resistors
9
ISL6121 Implementing Autoreset on the ISL6121 Hot Swap Controller.
Abstract
In applications where the cost, complexity or requirement for a system controller is avoided and an autonomous power control function is desired, a device that can monitor and protect against excessive current failures is needed. This tech brief shows how to implement such an autonomous controller using the ISL6121HIB. This application works only with the `H' version of this device. The `H' version refers to the enable function being asserted upon a high input.
Description of Operation
VIN Rpu = 2k FLTn ENABLE C = 0.1F GND ISL6121H
FIGURE 18.
Introduction
The ISL6118, ISL6119 and ISL6121 are all 2.5V to 5V power supply controllers, each having a different level of current regulation (CR). The ISL6118 and ISL6119 have 2 independent controllers with CR levels of 0.6A and 1.0A respectively whereas the ISL6121 is a single supply controller with a 2A CR level. Each of these devices features integrated power switch(es) for power control. Each switch is driven by a constant current source giving a controlled ramp up of the output voltage. This provides a soft start turn-on eliminating bus voltage drooping caused by in-rush current while charging heavy load capacitances. The independent enabling inputs and fault reporting outputs for each channel are available and necessary for the autonomous autoreset application. The undervoltage (UV) feature prevents turn-on of the outputs unless the ENABLE pin and VIN are > 2.5V. During initial turn-on the ISL6121 prevents fault reporting by blanking the fault signal. Rising and falling outputs are current-limited voltage ramps so that both the inrush current and voltage slew rate are limited, independent of load. This reduces supply droop due to surge and eliminates the need for external EMI filters. During operation, once an OC condition is detected the appropriate output is current limited to the appropriate level for 10ms to allow transient conditions to pass. If still in current limit after the current limit period has elapsed, the output is latched off and the fault is reported by pulling the corresponding FAULT low. The FAULT signal is latched low until reset by the ENABLE signal being de-asserted at which time the FAULT signal will clear. It is this described sequence of events that allows for the autoreset function to be implemented in a cost efficient manner requiring the addition of only an RC network per channel to the typical application. Figure 18 illustrates the RC network needed with suggested component values and the configuration of the relevant pins for each autoreset channel.
Initially as voltage is applied to VIN, the pull up resistor (Rpu) provides for pull up to VIN on both the ENABLE pin asserting the output once VIN > 2.5V and on the FLTn pin. Once turned on and an overcurrent (OC) condition occurs the IC provides CR protection for 10ms and then the FLTn pin pulls low through Rpu and also pulling the ENABLE low thus resetting the device fault condition. At this time the Rpu charges the cap and the voltage on the ENABLE / FLTn node rises until the ENABLE > 2.0 and the output is asserted on once again. This automatic reset cycle will continue until the OC fault no longer exists on the output. After several seconds in this mode of operation the IC thermal protection invokes adjusting the timing of the on-off cycle to prevent excessive thermal dissipation in the power switch protecting itself and surrounding circuitry. See Figure 19 for operation waveform.
.
VIN / FLTn 5V / DIV VOUT 2V / DIV
0V IOUT 1A / DIV
0A 4ms/DIV FIGURE 19. AUTO RESET OPERATION
Applications
* USB * 2.5V to 5V up to 10W power port protection
10
ISL6121 Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A
L
MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93
MIN 0.0532 0.0040 0.013 0.0075 0.1890 0.1497
MAX 0.0688 0.0098 0.020 0.0098 0.1968 0.1574
A1 B C D E

A1 0.10(0.004) C
e H h L N
0.050 BSC 0.2284 0.0099 0.016 8 0o 8o 0.2440 0.0196 0.050
1.27 BSC 5.80 0.25 0.40 8 0o 6.20 0.50 1.27
e
B 0.25(0.010) M C AM BS
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
All Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at website www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Inte is believed to be accurate and reliable. Howrsil ever, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other ri hts of third parties which may result from its use. No g license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web sit ewww.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation 2401 Palm Bay Road Palm Bay, FL 32905 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil Ltd. 8F-2, 96, Sec. 1, Chien-kuo North, Taipei, Taiwan 104 Republic of China TEL: 886-2-2515-8508 FAX: 886-2-2515-8369
11


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